I'm working on several projects in parallel. In addition to my "audio ARM-duino" (I need to give it a real name), I'm also working on a software-defined radio receiver. The primary goal is to keep the cost, size, and power consumption low and the spectrum coverage and bandwidth high. So I've been shopping around for highly-integrated receiver chips. Michael Ossmann of Great Scott Gadgets pointed me toward the ADRF6850. It's got an integrated variable-gain amplifier (VGA), quadrature mixer, and a PLL/VCO for tuning across a 100MHz - 1GHz range. You put an RF signal in, and you get baseband out. Nice.

I designed a breakout board and had it made via Laen's PCB order. Last night, I soldered it up, and this morning I started working with it through the I2C interface, using my Bus Pirate. By the afternoon, I was receiving pager signals at 929.675MHz, and aviation voice signals in the 118-137MHz band.

Software-Defined Radio front-end
Software-Defined Radio front-end

Here's a POCSAG pager data burst. You can see the preamble as a square-ish zig-zag at the left side (start) of the burst:

POCSAG pager data burst
POCSAG pager data burst

For the aviation audio signals, all I had to do was amplitude demodulate the quadrature data (which I captured with my computer's stereo audio input). Treat the quadrature sample pairs as complex numbers (which they are…), compute the magnitude of the complex vector, bandpass-filter the result, and you have the original audio!